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Altera_Forum
Honored Contributor
Honored ContributorIs it possible to get GHz frequency in Altera FPGA for PCI Express 1.0, 2.0?
I have seen that from the ALTPLL i am able to generate 1.4 GHz in Cyclone IV GX and 1.6 GHz in Stratix IV GX FPGA where as in Stratix V ALTPLL wont allow to generate any clocks. According to PCI E...
Altera_ForumHonored Contributor
Honored ContributorHi,
The PCIe Gen 1 and Gen 2 in Stratix V devices are supported using transceivers and transceiver TX PLL ie CMU PLL and ATX PLL. You could directly use the PCIe Hard IP to configure your interface for PCIe. The Hard IP will help to instantiate the TX PLL for you.
