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Altera_Forum
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8 years ago

Is CPLD required for booting CYCLONE 5 FPGA from QSPI flash.

in cyclone 5- fpga can’t able to fetch the program from spi flash FPGA - cyclone 5 (5cgtfd7d5f27i7n) SPI FLASH - epcq128si16n in our board only one spi flash (configuration flash) is ...
Altera_Forum's avatar
Altera_Forum
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8 years ago

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I presume that the power supply have tens to hundreds of microseconds rise time each, thus specifying nanosecond delays is meaningless respectively erroneous.

Expected power-up sequence is clearly specified in the Quartus device handbook. Read it.

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Hi,

sorry,power supply has rise time in milliseconds only ,By mistake i kept ns in excel sheet i updated and attached it.

I gone through the datasheet and i attached my doubt in that datasheet page .

Thanks & Regards

DEEPAK