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Altera_Forum
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8 years ago

Is CPLD required for booting CYCLONE 5 FPGA from QSPI flash.

in cyclone 5- fpga can’t able to fetch the program from spi flash FPGA - cyclone 5 (5cgtfd7d5f27i7n) SPI FLASH - epcq128si16n in our board only one spi flash (configuration flash) is ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi,

I tried delaying boot by holding nconfig low for longer after power up ,than also same issue.

I attached the power sequencing and delay between the power supply ,please once check it.

we are giving supply first to VCC (core supply),than VCC_aux,VCC_fpll,VCC_bat ,than VCC_pgm,VCC_pd ,VCCIO.

Is it required to power up first VCC than (VCC_PGM,VCC_PD,VCCIO) than we power up (VCC_AUX,VCC_FPLL_VCC_BAT).

Regards

Deepak