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KMour's avatar
KMour
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5 years ago
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IOPLL Source-Synchronous Compensation - Multiple Data Inputs

Hi there,

I'm using an IOPLL to generate a clock which is used to latch multiple data inputs. The IOPLL is in source-synchronous mode, as its reference clock is edge aligned with the data inputs. I understand that the IOPLL will only be able to compensate for one of the data inputs; which one will it choose? Do I have control over this?

My device is a Cyclone 10 GX: 10CX220YU484E5G.

Thanks,

Kyle

  • EngWei_O_Intel's avatar
    EngWei_O_Intel
    5 years ago

    Hi Kyle

    Sorry for late response due to long weekend here.

    Per our understanding, the compensation will be applied to all data input. We are seeing the compensation delay in the timing report.

    Let us know if you are seeing something differently otherwise.

    Thanks.

    Eng Wei

4 Replies

  • EngWei_O_Intel's avatar
    EngWei_O_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    5 years ago

    Hi Kyle

    Thanks for your inquiry. Allow me some time to check on the IOPLL spec before getting back to you.

    Eng Wei

    • EngWei_O_Intel's avatar
      EngWei_O_Intel
      Icon for Frequent Contributor rankFrequent Contributor
      5 years ago

      Hi Kyle

      Sorry for late response due to long weekend here.

      Per our understanding, the compensation will be applied to all data input. We are seeing the compensation delay in the timing report.

      Let us know if you are seeing something differently otherwise.

      Thanks.

      Eng Wei

      • KMour's avatar
        KMour
        Icon for New Contributor rankNew Contributor
        5 years ago

        Hi Eng Wei,

        Thanks for your reply. I didn't expect that to be the case, but it is consistent with what I'm seeing in the timing reports.

        Best regards,

        Kyle