Altera_ForumHonored Contributor13 years agoI/O states in Cyclone III in JTAG mode Hello all, In Altera's application notes it is specified that during JTAG mode all I/O pins are tristated. It is sometimes mentioned that the weak pull ups are enabled when the I/O pins are t...Show More
Recent Discussions5AGXFB7K4F40C5GCyclone V SoC 5CSXC6 Series GXB Utilization and LimitationsQuartus and power domainMCD of AGFA006R16A2E3EPower-Down Sequence Requirements for the Agilex 7 F-Series(2x F-Tile) Devices