--- Quote Start ---
If you're trying to infer a memory, you should be creating it as a 2D array, similar to this for a single port RAM:
ARCHITECTURE logic OF sp_ram IS
TYPE mem_type IS ARRAY (0 TO 63) OF
std_logic_vector (7 DOWNTO 0);
SIGNAL mem: mem_type;
BEGIN
PROCESS (clock) BEGIN
IF rising_edge(clock) THEN
IF (wren = '1') THEN
mem(to_integer(unsigned(address)))
<= data;
END IF;
END IF;
END PROCESS;
q <= mem(to_integer(unsigned(address)));
END ARCHITECTURE logic;
--- Quote End ---
Thank you for replying; I already did that, but the problem is when I used two variables to indicate the address, memory couldn't be initialized.
For 2D, what I meant is to make the initialization as 2D As:
TYPE mem_type IS ARRAY (0 TO 63 , 0 TO 63) OF
std_logic_vector (7 DOWNTO 0);
However, this initialization is not possible to me since MIF file is 1D.
Honored Contributor
