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Altera_Forum
Honored Contributor
Honored ContributorInterfacing FPGA with real hardware
Hello I'm newbee with FPGA and CPLD and start using them since the beginning of the year. I've finished an hardware for my old 8bit computer and all work well (interface CF) I've put ...
Altera_ForumHonored Contributor
Honored ContributorDo not worry about the "rden" port. What it does is disable the ROM read logic to save a bit of power. It does not put the ROM's outputs in high impedance, as you need.
In fact, FPGAs only truly support high impedance in the pins' output buffers, so no internal logic blocks actually use tri-state. So, what you need to do is to add a ROM block, then connect the ROM blocks to tri-state output buffers (alt_outbuf_tri?) and those to the pin. Add a bit of logic to tri-state the buffers when /OE or /CE is "1". And you're done.
