Integrating a custom component in SOPC [+IRQ]

The way this works is: [list][*]The software runs normaly[*]A hardware component detects an event that should trigger an interrupt and raise the IRQ line[*]The CPU finishes processing the current instruction, and jumps to the ISR[*]The ISR reads the hardware status, acts accordingly, and returns[*]The CPU continues executing the application[/list]

I'm simplifying a bit here, assuming you use the standard interrupt controller included in the Nios, and am not talking about the context save, but the essential is here. There are two requirements for the IRQ signal:[list][*]It must be at '1' long enough for the CPU to see it, especially if it is executing a long instruction. I don't know how the Nios II processes the IRQ signal and during what cycle it reads it, but to be sure the IRQ signal should be at '1' at least until the CPU enters the ISR[*]It must be put back at '0' before the CPU exits the ISR, or else it will enter the interrupt mode again and re-execune the ISR[/list]

An easy way to do this is to hold the IRQ signal at '1' until you are sure that the software acknowledged it, by using a register it must write to from the ISR in order to clear the IRQ status.