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Altera_Forum
Honored Contributor
Honored ContributorIn-System Programming with Cyclone III
Hello,
I have a custom board that uses the Cyclone III (EP3C40 - 240 pin) FPGA. The board has two headers for connecting to the ByteBlaster II. One of the headers is used for JTAG configuration straight to the FPGA to program the logic. This one works fine. The other uses the Active Serial In-System Programming configuration with a flash device (I have EPCS16). I've been able to program the serial configuration device in Quartus II using AS mode on the 'Programmer' window. I was able to Program/Configure and Verify (two check boxes selected) which programs to completion (100%) in Quartus II. The problem I've come across is that this doesn't seem to program my logic into the FPGA.. The logic design in VHDL is just a serial in parallel out shift register... I just had something simple to start with to test the board basically. So I have tested this logic which appears to work fine under ideal environment (dummy data and low freq clock signal) whenever I program the FPGA on it's own using JTAG mode. When I try out the AS mode with the EPCS16 the logic does not seem to be programmed in the FPGA (as my output from the shift register is all 0's no matter what input is used). Just curious if there are any good tips/other parts of the Quartus II software I should be aware of?? I've tried also setting the MSEL pins to: MSEL[2] = 0, MSEL[1] = 1, MSEL[0] = 0... for active serial mode. I've tried this after programming the EPCS16 device, disconnecting power and programming cable from the board and then resupplying power to the board in hopes that the FPGA will be configured directly from the configuration device. Also, I just read a ditty about SFL (Serial FlashLoader) in an370, I don't know if maybe I need to use this, but it looks like a lot of work to get Quartus II using the SFL files for a workaround.. I am using the free web version of Quartus II v.11 so I'd like to avoid having to buy into any megafunctions or purchase the full software suite just for configuration. I've attached a snapshot of the In-System Programming electronic configuration that the board is using: Ok any help is much appreciated!! Thank you in advance!! ~doddy12 Replies
Altera_Forum--- Quote Start --- How do you set the MSEL pins to 0 or 1? They need to be hard wired to ground or 2.5V, not controlled through a register or a microcontroller, as the FPGA could get a wrong reading on the MSEL pins when it starts up. Did you try to see with a scope if the FPGA is trying to read the flash when it starts? What are the levels on the nSTATUS, nCONFIG and CONF_DONE signals? --- Quote End --- Hi, Yes the MSEL is set using jumpers on the board. Basically the pins are jumpered either to gnd (all ground when I do JTAG mode) or to 3.3V I beleive actually.. I'll have to double check this on my board to see the voltage, but I beleive 3.3 is what was required, and I'll be sure to check the voltage on the board and get back on this. Either way though, yes it isn't controlled by any pins from a register or uC. I'll also have to invest in a scope (been on my wish list for a while now..). Thank you for the suggestions, I'll have to get some proper equipment and get back with results and possible more question! :) ~doddy- Altera_Forum
How do you set the MSEL pins to 0 or 1? They need to be hard wired to ground or 2.5V, not controlled through a register or a microcontroller, as the FPGA could get a wrong reading on the MSEL pins when it starts up.
Did you try to see with a scope if the FPGA is trying to read the flash when it starts? What are the levels on the nSTATUS, nCONFIG and CONF_DONE signals?
