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Altera_Forum
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13 years ago

In-System Programming with Cyclone III

Hello, I have a custom board that uses the Cyclone III (EP3C40 - 240 pin) FPGA. The board has two headers for connecting to the ByteBlaster II. One of the headers is used for JTAG configuration...
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Altera_Forum
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13 years ago

Depending on the location of the 10 pF capacitor, it may also worsen things. I agree with Dave that a source side series termination can clear most ringing edge problems.

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So for the SFL configuration, is the setup primarily done in Quartus tool to generate a .sof file for programming, and the circuit is just configured as I would for AS mode? My board has two headers, one which is set up for AS mode with the configuration device, and another which is for JTAG mode. So programming indirect JTAG mode, I'd assume that I would still connect my blaster to the header for AS mode yes? And then do the appropriate set up for the .sof file? Or am I way off track?

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Indirect JTAG programming means everything is done through the JTAG interface, with the help of the FPGA-internal JTAG hub and some additional code in the FPGA. It means that the second (AS programming) connector can be omitted.

If you don't want to include the SFL MegaFunction in your final design (it's only necessary when a new image should be programmed during regular design operation), you can load the default SFL factory image shipped with Quartus for each FPGA type.