Forum Discussion
The documentation (http://www.altera.com/literature/hb/cyc3/cyc3_ciii51016.pdf) states on page 9-11 that the MSEL pins should be tied to GND of VCCA, which is 2.5V. I can understand the confusion with the "configuration voltage" column in table 9-7,that states the voltage level of the configuration pins (i.e. those connected to the configuration device) and not the voltage level of the MSEL pins themselves. That said IIRC the MSEL pins don't have clamping diodes and only have pull downs, to tying them to 3.3V instead of 2.5V shouldn't damage the FPGA. However you may set the FPGA in a bad configuration mode if the 1.2V and 2.5V supplies start and reach their required voltage level before the 3.3V supply. It is hard to tell because I don't know at what moment exactly the FPGA samples the MSEL pins.
You can also check the nSTATUS, nCONFIG and CONF_DONE pins with a voltmeter, just to check what state the FPGA is in after you powered up the board. And also, the JTAG configuration mode can always be activated, whatever the MSEL pins are. So you can keep your MSEL pins in the AS configuration and still use JTAG to configure the FPGA if you want, there is no need to change the switches settings.