In-system FPGA "retest"

I lately faced a number of issues with an FPGA board, that was refurbished (a BGA CSP sensor has been replaced several times, i.E. the board has been subdued to some soldering stress, etc.).

I see reproducible odd behaviour when using the device with my regular FPGA configuration, although it works generally. Timing has been closed, all reports are clean so far, so I expect no issues from that corner.

Now my question: Is there a way of FPGA (Strastix III) retest in my System supplied by Altera? I'd expect something like a configuration I may download to the device that runs automatically internally, without driving pins and finally gives the BIST results, i.e. go/no go regarding functionality, timing etc. to the SignalTap or similar?

Any hint is welcome (including an RTFM-link to possibly existing material I didn't find so far...). Thanks!