In altera Transceiver, why some protocols need rate match fifo, some don't need?

Hi genoli,

I understand that if the the ppm is exceeds the frequency tolerance between the bit rates of the transmitter and receiver at the two ends of a link, the transceiver will not work correctly?

But a silly question here, why the ppm will make them don't work?

Why my 8b/10b and remaining PCS blocks can not use the receiver slow clock rather than cmu slow clock? what will be the impact?

The reason i ask so is although the spec state that PCIE, GIGE and XAUI protocols are compulsory to use rate match fifo. But why i need to use? I just don't understand.