Implementing HT protocol

Hi Guys, am new here!

I need to implement a HT link between stratixII and AMD opteron. I have to transport the data from LVDS link in FPGA to AMD via HT. Can anyone tell me what is easiest way of implementing this? I am using @ltera HT cores, composed of 3 buffers posted, non-posted and response. Basic question, Do I need to use all of these buffers? or posted is enough for writing purpose...I am not reading anything from AMD its just 1way communication. It just dumping the data to AMD at high speed.

Can anyone suggest me best book for HT?

Thanks!