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Altera_Forum's avatar
Altera_Forum
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11 years ago

Implementing custom DDR controller in Cyclone SOC

Hi, I understand that there are external DDR memory devices attached to HPS and FPGA section in Cyclone SOC. Is it possible to have my own DDR controller in the FPGA section and use the ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

The controller and PHY are both harden silicon inside the HPS block and the PHY interface cannot be exposed to the FPGA in order to add your own controller. The closest you can get to what you were asking about is to instantiate the memory controller in the FPGA fabric and then connect it to the HPS-to-FPGA bridge, but you'll probably take a performance hit by doing that.