Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi,
I don't have any direct experience with this but based on this document www.altera.com/literature/wp/wp-01188-hard-memory-controller-cv.pdf it seems like it is possible. Specifically it states that the memory controller can be bypassed (Bottom of page 2). I would probably confirm this with Altera though. The Altera Cyclone V SOC Development Kit would be a good board to try this on since it has dedicated DDR3 for the FPGA as well as a hard memory controller and phy for the FPGA.