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nome
Occasional Contributor
Occasional ContributorImplementation of option bits FPGA configurations
Hello, I am currently working on a project that involves an Arria II GX FPGA with Max II CPLD, and CFI_256 Flash memory in FPP X8 mode. I have a requirement of using only page 0 in the flash memor...
FakhrulA_altera
Regular Contributor
Regular ContributorHi nome,
You may take a look the table of Option Bits Sector Format and Figure 12 below which can be found from Parallel Flash Loader Intel® FPGA IP User Guide. It might give you some insight.
