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Altera_Forum's avatar
Altera_Forum
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10 years ago

image read in vhdl

i want to read an image (or preferably a matrix of size 8x8) pixel by pixel in one clock cycle(if rising edge then read one pixel in 2nd rising edge 2nd pixel)....thanks in advance
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

wasting clock cycles means the algorithm should start after some defined clock cycles

yes i have drawn circuit on paper... the thing is i am trying to do the project first on a small matrix of 8x8... if the algorithm works properly then i will implement with the complete 512x512 image