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Altera_Forum
Honored Contributor
17 years agoI was never able to ferret the pin-assignment details from the Altera docs, but a co-worker did so: here is an example of embedding pin assignments in Verilog code:
//System input SYNC_IN /* synthesis altera_chip_pin_lc = "5"*/; output SYNC_OUT /* synthesis altera_chip_pin_lc = "39"*/; input SW_2 /* synthesis altera_chip_pin_lc = "18"*/; input SW_1 /* synthesis altera_chip_pin_lc = "21"*/; output LED1 /* synthesis altera_chip_pin_lc = "37"*/; output LED2 /* synthesis altera_chip_pin_lc = "22"*/; //SRAM inout [15:0] SR_DTA /* synthesis altera_chip_pin_lc = "218,226,230,231,232,233,234,235,188,189,194,195,196,197,200,201"*/; output SR_OEN /* synthesis altera_chip_pin_lc = "219"*/; output SR_WEN /* synthesis altera_chip_pin_lc = "187"*/; output SR_CEN /* synthesis altera_chip_pin_lc = "202"*/; output [18:0] SR_ADR /* synthesis altera_chip_pin_lc = "236,224,223,221,237,238,239,240,4,182,183,184,185,186,203,217,216,214,207"*/; Wade Hassler