Forum Discussion
Honored ContributorI'm new to FPGA and have a question
Hi There,
I have recently purchased a DE1 kit with the Cyclone II FPGA on it. I have had a go at VHDL and found it enjoyable, so far the most complex thing I have created was a 4 bit parallel adder. What confuses me, and I am unable to aquire a clear answer, is how the FPGA holds its configuration? I have a feeling it is being store in the 8 legged Flash/EEPROM that is next to it on the board and possibly that is loaded into a configuration RAM area inside the FPGA on startup, is this a correct assumption? If so, is it possible to have the configuration data stored directly in the FPGA or would I be forever having to put a Flash/EEPROM chip with my FPGA on every design? many thanks10 Replies
Altera_ForumI recently found this device online that can be used to program other Altera EPLD devices via USB or serial port by just jumping your device through the jtag port.- Altera_Forum--- Quote Start --- Plus, if I were to design my own board, I would design the USB Blaster (USBtoJTAG) into the board, itself. Terasic has done this with most, if not all, of their boards. --- Quote End --- Yes, but there is a small problem, the USB Blaster specs are undisclosed. Some time ago I found somebody reverse engineered the USB Blaster though.
- Altera_Forum
TerASIC is the way.
- Altera_Forum
If USB Blaster would be still too expensive, a homebrew ByteBlaster II (printer port operated JTAG adapter) could do. JTAG in-circuit programmability is usually the best solution for production scale, for development phase, JTAG interface is effectively indispensable, independant of main configuration source. In an embedded system, the FPGA configuration can be also provided by a processor, e. g. using passive serial scheme, but JTAG should be still designed to the board.
- Altera_Forum
Expensive? Terasic has a _better_ USB Blaster than Altera for $50.
Plus, if I were to design my own board, I would design the USB Blaster (USBtoJTAG) into the board, itself. Terasic has done this with most, if not all, of their boards. Not having JTAG could be a _serious_ development liability. Cheers, - Ura - Altera_Forum
ah good, all make more sense to me now.
Would this mean I could program the configuration data to the serial flash using a common flash programmer (or homebrew) instead of having to buy the expensive JTAG equipment? - Altera_Forum
Oops, got a little too inclusive in the "on all accounts"
Missed the sentence about "If so, is it possible to have the configuration data stored directly in the FPGA". My bad. - Altera_Forum
No, you need an external configuration memory, usually a serial flash. Cyclone III also supports a parallel flash. The configuration memory can be programmed through the FPGA JTAG interface, so a minimal operational system consists of the FPGA, configuration memory, clock source, JTAG connector and power supply.
- Altera_Forum
So this means I can design a board with a Cyclone II FPGA on it and have the configuration/firmware flashed directly into it?
also, is the Cyclone II a flash once only device or can it be reflashed as you can with a Flash version PIC? - Altera_Forum
You are correct on all accounts.
If you use the Max II class of products from Altera, the configuration is stored inside the same part. Most FPGA's need to be configurated after startup, and usually from an external source.
