IIR filters in FPGA

@milosd

Most DSP related textbooks introduce IIR filters with there normal form implementation that can directly be derived from the z-domain transfer function equations.

This kind of normal form implementation is however very sensitive to 1) the coefficient values and 2) the rouding or truncation effects. The finite word length effects give rise to digital noise, but even more important limit cycle oscillations.

One often used solution is to implement the IIR filter as a cascade of second order sections as parrado rightly introduces. But it is well known that second order sections can also have limit cycle oscillations.

For hardware implementation on chip or on FPGAs "Wave Digital Filters" (WDF) are the best solution. Due to their structure Wave Digital Filters are less sensitive to their coefficient values. So you can realize them with much shorter coefficients. (64 bit coefficient values are really very long.).

Also Wave Digital Filters are the only class of IIR filter implementations for which it has been mathematically proven that there is absence of limit cycle oscallations.

Try using WDF's it is the best and in FPGA resource terms the cheapest you can get!