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Altera_Forum
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16 years ago

IIR filter implementation on cyclone FPGA

Hello everyone, i am trying to design a second order LPF with 8Hz cutoff frequency and sampling frequency 20kHz, below is the z transform y(z)/x(z) = 0.1576*10^(-5)*(1 +2*z^(-1) + z^(-2))/...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Hi kaz

thanks for reply,

i have to write a code in verilog HDL for above filter, my input and output bit width is 12bit and its vary from -10V to 10V so the precision will be around 5mV per bit. can you please help me in this.