Altera_Forum
Honored Contributor
16 years agoIf there is no output port in code, Why the project will use 0 LEs after compilation?
Hi!
Everyone, Nowdays I meet a question , If there is no output port in code, Why the project will use 0 LEs after compilation? For example; This is a short code with output port: ------------------------------------------ module IF_CASE1(clk,rst,datain/*,dataout*/); input clk; input rst; input [3:0]datain; //output [2:0]dataout; reg [2:0]dataout; always@(posedge clk) begin if (rst==0) begin dataout<=0; end else begin if (datain<4) dataout<=1; else if (datain<8) dataout<=2; else if (datain<12) dataout<=3; else dataout<=4; end end endmodule -------------------------------------------------- and the printscreen is below after compilation. http://images.cnblogs.com/cnblogs_com/tdyizhen1314/257630/r_%e6%88%aa%e5%9b%be2.jpg but if the project has output port , the result is different from above. you can see the compilation message. http://images.cnblogs.com/cnblogs_com/tdyizhen1314/257630/r_%e6%88%aa%e5%9b%be1.jpg Can you make a distinction bewteen the two situlations in detail? Thanks!