Hello,
Aiman
Thank you very much.
Because I cannot get SA type now, I am going to use SC type instead for a while.
>What is the logic implemented?
It's Various. Almost of these is using Verilog.
Linear time code reader/generator , video sync separator , SPI(Serial Peripheral Interface) slave, and etc.
I also use IPs such as PLL, MULT, RAM.
If device is SA type, I will implement ADC and remote system upgrade.
>What is the outside device your are referring to?
It is a Microcontroller(Renesas RA3M6) which connected with MAX10 by SPI.
It's a host controller of this system.
I am sorry to be slow in noticing.
I must select SA or SC on "Assignment - Device" Window before I compile sources on Quartus Prime. Is it true?
If the same .pof file is usable for SA and SC, it is very good for simplification of managing .pof files. Is it impossible?
And if the same source file is usable for SA and SC, it is very good for simplification of managing source files.
When I select SC on "Assignment - Device" Window to generate .pof file for SC device,
is an error given if I do not exclude codes of ADC and remote system upgrade from source?