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Altera_Forum
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17 years ago

I2C on EPM570M100

Hi all, I am trying to implement the I2C protocol (master side) on an EPM570 CPLD. I am new to VHDL so I am having trouble finding the errors of my code. Basically the code is working, I can s...
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Altera_Forum
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17 years ago

OK, sounds reasonable.

Have you verified that the Data relationship to the clock is OK in the FPGA to EPM570M100 direction? i.e. If the Analog part latches data in on the rising edge is there going to be a setup violation?

This could happen if the data changes very close (or even before) the clock at the EPM570M100 inputs.

Might be worth looking at the timings on your scope and checking the setup/hold times on the EPM570M100 datasheet.