Forum Discussion
Altera_Forum
Honored Contributor
13 years agoboth Flash devices have SPI slave interface, so U only need configure one SPI master interface on your FPGA.
And I think both SPI slave interfaces only support "clock polarity 1, clock phase 1" or "clock polarity 0, clock phase 0". shift direction MSB first. for SCLK U can select upon to 33 MHz, I sugest 10 MHz for testing. Altera supply one API "alt_avalon_spi_command" for SPI master core. U need to code your own driver for your Flash. maybe U can find such drivers from internet. Or tell me what do you wanna do with Flash. maybe I can give you code example.