I put the DDR3 controller on a 10M25DAF484 device, for that application I can use just one DQ block so I'm able to use only the bank6 but the RUP and RDN are on the bank5. Is there a way to put all the DDR signal on the bank6 in order to recover bank5?

Hi Sir,

I can move the RUP and RDN signals from bank 5 in a couple of pin of DQS2 group and ay yhe same time I'll loose the DQS2 functionalities. Is this correct. --> Yes, you're right.

Please also take note on the following impacts on your DQS groups when the RUP and RDN pins in devices being used as DQ and DQS pins when they are not used to support OCT:

1) If the RUP and RDN pins are part of a ×4 DQS group, you cannot use that DQS group in ×4 mode.

2) If the RUP and RDN pins are part of a ×8 DQS group, you can only use this group in ×8 mode if any of the following conditions apply:

• You are not using DM or BWSn pins.
• You are not using a ×8 or ×9 QDR II SRAM device, as the RUP and RDN pins may have dual purpose function as the CQn pins. In this case, pick different pin locations for RUP and RDN pins, to avoid conflict with memory interface pin placement. You have the choice of placing the RUP and RDN pins in the same bank as the write data pin group or address and command pin group.
• You are not using complementary or differential DQS pins.

Thanks

Regards,

Aida