Forum Discussion
Honored ContributorI need help just understanding this program for class
Hi all:
I am a newbie to the Altera platform, well really a newbie to all programming. I have to use this program to design and simulate digital circuits. I am have no problems writing out the TDF or text file for it. However, when it comes to saving it and compiling it I am running into errors and I am even trying to use the tutorials and they are confusing me even more. Can someone please help me learn this program and what all I can do with it and/or what steps I need to take to build these circuits. First one, is this: % Memory IC Activation in AHDL (FIG 3-39) March 30, 2010 % SUBDESIGN lab_two ( rd, ra, rc, rm : input; -- inputs for rd, ROM-A, ROM-B, & RAM mem_low : output; -- output for memory activation ) VARIABLE V, W, Z, Y : NODE; -- my intermediate nodes BEGIN Z = !rd; -- buried node for inverter no. 1 W = !ra# !rc; -- buried node of NOR gate V = !rm; -- buried node for inverter no.2 Y = V# W; -- buried node of my OR gate mem_low = Z & Y; -- this is the result of my products END;9 Replies
Altera_ForumI concur, I concur. It is actually giving me the blues in all of my other courses. It's like I am having to learn to do 2 classes in one.
--- Quote Start --- The above tdf file can be compiled as a top design file by Quartus, it can be also simulated by the Quartus simulator. What are you asking in particular? --- Quote End --- I am supposed to turn in the tdf and I am supposed to be testing the tdf that I wrote: When it comes to setting up the simulator, I get stuck and the software tells me that the simul;ation time is unexpected or something to that effect. It also does not show the timimg bar moving at allm so I don't know what I am looking at.- Altera_Forum
A course that doesn't emphasize how an HDL is to be used is even more worrisome.
- Altera_Forum
teaching AHDL when the Altera simulator is slated to be discontinued is a bit worrisome.
- Altera_Forum
The above tdf file can be compiled as a top design file by Quartus, it can be also simulated by the Quartus simulator. What are you asking in particular?
- Altera_Forum
Whoa! You are indeed, in full freakout mode homie. So I take it this is for a class, and you're following every step in a lab manual? Moreover, I would imagine that the due date for this lab is fast approaching, which is only adding to your sense of panic.
I'm no expert on AHDL, but from what I understand it's usually used to program program array logic (PAL) devices. I'm tempted to go into to detail, but I get the feeling that you already know this, so I won't bore you. Unless, this lab requires you to program an IC that will then function as your AHDL program describes (i.e. if your program AND's to terms together the IC will AND two terms together), the only thing for you to do is a functional analysis. This can be done using the functional simulator in Altera. The steps for using AHDL software are as follows:- Write a HDL program that describes the circuits function, debug it as necessary.
- Do functional testing on your program to ensure that it functions as intended.
- Once step two is done, a designer pics a programmable logic device, and then does timing simulation. Timing simulations are basically functional simulations but with timing delays between the input and outputs.
- Finally the chosen device is programmed and actually tested for proper functionality. Of course, this assumes that steps 1 through 3 went off with out a hitch.
- Altera_Forum
Quartus. And yes I am following a lab manual and I am trying to figure out what all is supp0osed to be included say with rogramming a circuit. i.e., If I am told to design a circuit for instance. I need a circuit to provide a high when AB & ABC + !AB + C is true. I know how to write it using AHDL, but when I write it as a code, what is next, do I set it up for a timing analysis or can I actually build the circuit and see it perform with actual devices or can I set it up like multisim using schematic drawing and watch it perform. I am lost on seeing whether my programming is causing the circuit to actually perform the way that I wrote it. I guess that I am trying to figure out the steps and the process of actually completing or using the software to its full capacity. I hope I haven't confused you (as I am now confused). But maybe you can help???????
- Altera_Forum
You sound pretty freaked out, which is certainly understandable if this is your first time seeing AHDL, and new to programming in general. I don't have much experience with AHDL, but I might be able to help you out (though I'm not promising anything).
Are you following a lab guide, if so what software tools does it ask you to use (i.e. Quartus, ModelSim, ect)? I ask because I know, for VHDL at least, there are many EDA simulator programs that can be used. However, if you're just having problems with understanding the language I would suggest doing a Google search for AHDL pdf's. Without knowing what tools you're using I can't help any further. - Altera_Forum
L Red. I need help with the compiling and doing the synthesis and the simulation. For instance, that program that I copied into the body of my post, I know that it compiled correctly, however, when I got to the simulation part it still gave me errors. Then I got those to go away (and I don't remember how), well after that I tried to run the program in hopes that I would either see a timing diagram or an actual circuit operation simulation. But, apparently I do not know what I am doing thus I am lost confused and frustrated!!!!! Is there an easier way to do this, something that has a step by step operation to it?
- Altera_Forum
Hola Lew,
do you need an explanation of what circuit this AHDL code is describing, or just need help with the compiling errors?
