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Honored Contributor
Honored ContributorI can't modify a file in quartus after generated the QSYS system? Please Help.
I'm making a flash controller in FPGA. I wrote the principal controller code, and another file that works like a test bench (a counter that generates the write and read instructions with datas) I nam...
Altera_ForumHonored Contributor
Honored ContributorWhat do you mean by "showing me the old values"? The signal names, or is it that when you look at the waves it seems that it is still the old logic that is in place?
If it is just the signal names, the ones that are not part of your design any more are shown in red, and you need manually to delete them and insert the new signals in the window. If it is just the wave that looks the same, did you click again on "run analysis"? If you still see what looks like the old logic would generate, then it means that either your modified code wasn't used by quartus, or that it doesn't do what you think it did. In either case check with the RTL viewer what Quartus synthesized.
