HPS2FPGA bridge throughput

Hi all,

I just want to add some feedback here.

I have now successfully integrated the modular SGDMA from BadOmen (http://www.alterawiki.com/wiki/modular_sgdma) on FPGA side and connected it as read master to the FPGA2SDRAM interface. I decided to use a FPGA DMA as I think I can get the highest performance this way (HPS DMA connected via L3, bandwidth to SDRAM controller must be shared with other peripherals).

My FPGA QSys bus logic allows a theoretical throughput of 320 MBytes/s to date (32 Bit Avalon MM IF on custom component @ 80MHz --> much room for optimization). With signal tap I see that the DMA is able to copy the data with a throughput of about 305 MBytes/s.

This looks really promising now :-)

Thanks again,

Volker