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Altera_Forum's avatar
Altera_Forum
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11 years ago

HPS power consumption

If I use only FPGA part of Cyclone V SE device, the HPS is in reset state with CPU0 and CPU1 or I should load code to sleep CPU1? And if HPS is not used the default frequency is 800 MHz? Should I ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

I see, the original post was for a dual core CycV :) We have only a single core CycV and fusing its reset line would ultimatively disable the preloader :) And yes, this IS crazy :D But we have economical reasons to re-use a certain COM that we obtain in high volumes, and that one has a CycV HPS we just don't need.

I put a

while(1)

{

__asm__("WFE");

}

into the HPSs kernel code now, as a first step.