How to write Transfer function using QUARTUS II

I did upload a whitepaper in the discussion thread around PID controllers:

http://www.alteraforum.com/forum/showthread.php?t=33192&highlight=pid+controller

Additionally, the question that you ask is confusing. HDL design (VHDL or System Verilog) captures a hardware design; the hardware design being reflective of whatever algorithm that you are implementing. So there are numerous technology steps:

1. Matlab/Simulink/Python/C model of your controller + plant or general dynamical system model

2. Transform to digital domain of the controller (say bilinear Z transform)

3. General digital architecture planning for the controller

4. Fixed point mathematics precision (say 16 or 24 bits)

5. HDL Coding

6. HDL Testbench

7. Refinement

8. System Testing