Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi,
I think the Options are old data, i.e. the data being overwritten from the other port is shown a the "read Access side" and new data being a feedthrough of the Input data that are to be written and the output (Output being "wired" to Input rather RAM Location.) There shouldn't be a mix of old and new bits - at least if the data and RAM ports are registered to System Clock (i.e. not asynchronous)... Otherwise the mix of data will be more due to the Input on the write side is not stable (bits are "arriving" asynchronous) at read Access... But this would be same if asynchronous data would be just registered once and by this treated as synchronized...