Altera_ForumHonored Contributor18 years agohow to use cyclone's on-chip-memory? In my design, I need a 4 ports RAM. The input/output ports are below: module ram(data1,waddress1,data2,waddress2,wena,clk,raddress1,raddress2,rena,q1,q2); input clk,wena,rena; inpu...Show More
Recent DiscussionsCyclone-V SCFIFO - adding ECC to M10K/MLAB/Auto memoryWill serialization factor of 6 in LVDS serdes IP be supported in the future on Agilex5?System PLL of Agliex5 PCIE example design cannot be locked after configurationJTAG Chain Broken on Agilex 7-I Dev KitRequest for Cyclone V Pinout File Information