how to speed up the read-modify-write DDR2 with HPC II?

For single word transfers you may have to live with the delays.

DDR2 is fast for burst accesses transfers, but the 'time to first data' for memory reads hasn't really changed much over the last 20 years.

A 3.5GHz x86 cpu will only run at anything like that speed when all the code and data is cached.

If you are doing occaisional random accesses, then you might find that an uncached read will return data sooner than a read via the data cache.

But then you need to be very careful about interactions with any data caches.

FWIW I see 16 clocks for isolated random uncached reads of SDRAM. DDR and DDR2 are very unlikely to be faster - and may be slower.