How to set the Sample Frequency of the Altera Modular ADC core

When running 5_ADC_LAB/ADC_Streaming_Lab in the ADC Toolkit from Arrow MAX 10 FPGA Evalution Kit, I notice that

the Sample Frequency is 250,000 while the snapshot in the document is 500,000.

Where and How to change the ADC Sample Frequency in the Quartus/Qsys?