Forum Discussion
BXia
Occasional Contributor
4 years agoHow to set the LVDS SERDES intel FPGA IP for receiving mini-LVDS signal
Hi,
I'm using the LVDS SERDES intel FPGA IP to receive Mini-LVDS signal, I need to receive 2 data by a clock, however, the minimum SERDES factor is 3, so how to set the IP, or anything else I need ...
JohnT_Altera
Regular Contributor
4 years agoHi,
Yes, you are correct.