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Altera_Forum
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11 years ago

How to set internal pul-up/pull-down to an FPGA pin in Quartus ?

Hi Can somebody let me know how to make a FPGA pin to be connected with an internal pull-up or pull-down resistor ? Also I would like to know how to verify from the reports generated from the Quar...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

If you are referring to reserving unused IO pin to pull up/down internal, you could do the following:

1. Open up QII pin planner

2. Right click on a IO pin

3. Look for Reserve

4. Then select if you want the reserved pin to be connected to VCC or GND.

You can then verify the compilation through .pin file or Fitter report.