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student8's avatar
student8
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2 years ago

How to resolve timing violations in the accumulator?

My counter has been split into a combination of 2 16-bit counters, ultimately achieving a 32-bit counter. The recommended method by Quartus is to insert a pipeline between different bits of the count...
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sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 years ago

See my reply in your older post. Something is fishy here with your adder.

  • _AK6DN_'s avatar
    _AK6DN_
    Icon for Frequent Contributor rankFrequent Contributor
    2 years ago

    I agree. The timing report shows at least a nine level CIN/COUT ripple carry chain.

    If you want to go for high speed, you need to implement a carry lookahead adder design.

    The design as implemented is not going to run very fast due to the implementation.

    • student8's avatar
      student8
      Icon for New Contributor rankNew Contributor
      2 years ago

      Thank you for your reply. The performance has improved after switching to a carry-lookahead adder.