Forum Discussion
Altera_Forum
Honored Contributor
13 years agoHi,
I can understand the code on Linux, where it has to acquire the IRQ for the MSI and it needs the ISR handler to perform interrupt function when it receive particular interrupt signal from the IRQ allocated. However, I need some guidelines on 1) how to generate MSI interrupt in Altera? Please anyone if have any recommended examples. 2) and what values should be configured to these signals? app_msi_tc[2:0] in Application MSI traffic class: This signal indicates the Traffic Class (TC) used to send the MSI (unlike INTx interrupts, any TC can be used to send MSIs). app_msi_num[4:0] in Application MSI Offset Number: This signal is used by the Application to determine the offset between the base message data and the MSI to send. 3) how to make sure that the MSI that I generate is after DMA write from FPGA to PC completed? so that it wont corrupt my DMA write data. Advice needed and thank you.