How to program an ALTPLL_RECONFIG core?

Hi Anand,

Thanks for replying, I checked the mif file and it is definitely being read by the ALTPLL_RECONFIG core.

However, given that the (ALTPLL generated) mif file is loaded into the ALTPLL_RECONFIG core a single reconfig pulse should not change the clk0/cl1 values right? Unfortunately this is not the case, both clock signals change to different values.

I then used the read_param signal to read back the cached values after reset and all I get back is zeros for the N/M/clk0/clk1 counters. This is strange as I can see the mif values being loaded into an altsyncram4 block during simulation. If I use the read_param signal after I programmed the ALTPLL_CONFIG myself I get all the right values (the ones I programmed in) so the read back is working.

So my findings are that:

1) The ALTPLL generate mif file loaded into the ALTPLL_RECONFIG core does not give the same results as using the Quartus generated ALTPLL values.

2) You cannot read back the ALTPLL_RECONFIG cached values until you have programmed the core.

I am sure the first one is incorrect as CycloneIV is not new and many customers must have used the ALTPLL_RECONFIG core successfully but I can't make it work, any clue as to what is going on?

Thanks,

Hans.