How to preserve nets during quartus analysis/synthesis

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Hi,

I new to using Quartus- I'm using v 5.1. After doing analysis/synthesis, while setting up Quartus simulation, I notice that the user-entered node names appear to be synthesized away. In other words, to display the sim results of a node, I must choose the origin of that node. If I choose an unregistered node as a destination, it disappears from the simulation waveform window.

Any suggestions would be appreciated,

Gary

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Hi Gary,

you can use one of three synthesis attribute in order to preserve node:

in verilog:

to save a wire:

wire net1 /* synthesis keep */ ;

to save reg:

reg reg1 /* synthesis preserve */;

if the register has no fanout you have to use

reg reg1 /synthesis noprune */;

Kind regards

GPK