Forum Discussion
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- The digital PLL is a different approach than the VCO. Can I ask where this 50kHz clock is coming from? Jake --- Quote End --- Another question is what are you doing with it? Is it possible to use the 50kHz to clock your signals into the design with FIFO's or domain crossing circuits? If you are going from 50kHz to 100MHz, the domain crossing is trivial. (just edge detect the input signals).