Forum Discussion
How to make a custom IP (that integrated with an example design) to create testbench in Arria 10
- 3 years ago
No, the file you put in the simulation files section is the design file that should be used when the design is simulated, not a simulation testbench. This can be the same file as the synthesis file or it could be a different design file optimized for simulation.
I believe the initial issue has been resolved. Now, I will transition this thread to community support.
At Intel, we prefer a new case for each unique technical problem, as it aids our case analysis and helps us assess our customer support requirements.
Could you please raise a separate case for your follow-up technical problem, even though it may or may not be assigned back to me?
If you have any further questions or concerns, please don't hesitate to reach out.
Thank you for your understanding and have a great day!
Best Regards,
Richard Tan