Forum Discussion
Sijith
Occasional Contributor
Occasional ContributorHow to make a custom IP (that integrated with an example design) to create testbench in Arria 10
Hi,
I have a custom IP of a counter and that connected to the PCIe DMA transfer example design for the Arria 10 device(I have attached the counter code counter.v with this message). I also added ...
No, the file you put in the simulation files section is the design file that should be used when the design is simulated, not a simulation testbench. This can be the same file as the synthesis file or it could be a different design file optimized for simulation.
sstrell
Super Contributor
Super ContributorCheck out this training: https://cdrdv2.intel.com/v1/dl/getContent/653122?explicitVersion=true
