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Honored Contributor
11 years agoHi Dez74,
If you want to use LOANIO61/LOANIO62 for UART0, you can set the "UART0 pin multiplexing" to "HPS I/O Set 1" in QSys instead of routing it to the FPGA. Then you can just route to I/O ports in the top file, and during compilation it will automatically set those pins to B25 and C25. As for the error (169026), this is due to the HPS_UART_RX/TX pins being set to 3.3V, while the bank is at 2.5V. In the pin planner, set the I/O Standard of these pins to 2.5V. Marcopoliptica