Forum Discussion
3 Replies
- Altera_Forum
Honored Contributor
The DE0 board has clock inputs on both GPIO connectors.
- Altera_Forum
Honored Contributor
So for example, I can just connect the external clock source to the pin1 (GPIO0_CLKIN0) in GPIO 0, and assign the clock signal in FPGA to AB12, then the clock frequency of CPU core will become 8MHZ? Is it correct? Thank you for your reply.
- Altera_Forum
Honored Contributor
I'm not aware of the clock distribution scheme of your design, but you can basically clock it from CLKIN0 instead of the 50 MHz crystal. If you only want to change the clock frequency without needing synchronicity to an external clock, changing the PLL settings would be the easier way.