How to implement high speed port(such as HDMI) into FPGA chips

Hi experts, We just do some low speed IO function previously and some high speed port needed to be implement recently. Could you please help some confusion.

Take HDMI port as example:

1.We can find intel chip IO standard clearly as showed in Quartus. At the same time, HDMI formal SPEC/protocols defines differential ports electricals. We can not match HDMI SPEC with Quartus I/O standards well. Quartus shows IO standards such as LVDS/3.0V PCI/differential HSCL, etc. It seems no TMDS standard(HDMI) can be found. Does it means we can not implement HDMI bus on such chips. (Meanswhile we search some FPGA chips but can not find HDMI TMDS bus IO standard directly). Could you teach us how to match high speed electrical standard to intel FPGA IO standard? Does it have any details electrical SPEC documents for intel FPGA chips.That we can confirm intel chip IO standards with high speed bus protocol SPEC.

2.How to determine/fine tune Differential Voltage swing+/- in Quartus? Or can we adjust Differential Voltage swing+/- in Quartus? such as +-200mv or +-400mv.

3.Does this website has any hardware schematics reference design for FPGA chips.

Thanks very much.