Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThank you for your reply.
You suggest me to use DDS and I am a little puzzled. Because the period deviation between 1.1999MHz and 1.1998MHz is 69.5ps(14.4GHz), I don't think FPGA can realize this high frequency. Is it the jitter you metioned? I am a beginner of Altera's FPGA, and there must be some algorithm I don't know. Could you give me some advice?