Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

How to generate 4.5 digits resolution frequency with FPGA’s PLL

I want to use Altera's FPGA to realize a frequency generator, and the frequecy has 4.5 digits resolution. For example, when 100.00kHz is output, the precision is 0.01kHz; when 10.000Hz is output, the...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thank you for your reply.

You suggest me to use DDS and I am a little puzzled. Because the period deviation between 1.1999MHz and 1.1998MHz is 69.5ps(14.4GHz), I don't think FPGA can realize this high frequency. Is it the jitter you metioned?

I am a beginner of Altera's FPGA, and there must be some algorithm I don't know. Could you give me some advice?