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DKron4's avatar
DKron4
Icon for New Contributor rankNew Contributor
7 years ago

How to generate 128-bit DDR3 interface on Cyclone 10 GX

I'm trying to implment a 128-bit DDR3 interface in a Cylone 10 GX 10CX105. I have made a design to test this, but cannot get successful placement. Is there a reference example of how to configure suc...
NurAida_A_Intel's avatar
NurAida_A_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago
Hi DKron4, My apology for the delay in response. I'm afraid there is no other way as the error message in Quartus also stated clearly on the memory limitation. The maximum no of chip selects allowed is 4. I am sorry for the inconvenience caused. Regards, NAli1